Russian engineer and scientist Boris Babayan and his son Evgeny are working on a project to create a chip based on the new Elbrus-B architecture. It is planned that the chip will appear on it by 2027. A feature of the architecture is the parallelism of computing. According to the developers, it will surpass famous foreign architectures "by 30-200 times."
As CNews found out, by 2027 Russia plans to release the first chip based on the new domestic architecture "Elbrus-B." Boris Babayan and his son Evgeny Babayan are working on its development. They told about this at the Strategic Session of the Economic Cooperation Area in Moscow in April 2025.
Elbrus-B is a parallel computing system consisting of an algorithmic language, an operating system, and a microprocessor hardware architecture. This architecture is being developed as an open architecture with the possibility of involving all interested participants, including foreign ones.
"The architecture of the parallel system allows us to provide 30-200 times more power than foreign counterparts based on similar technological standards," Evgeny Babayan told CNews. This is achieved due to the ability to solve a large number of unrelated computational tasks simultaneously.
According to Babayan, the power of the Elbrus-B microprocessor, manufactured using 90 nanometers (nm) technology, is comparable to the power of a foreign processor (RISC-V, X86, PowerPC, ARM), manufactured using 14 nm technology. And the power of the Elbrus-B processor, manufactured using 5 nm technology, "is unlikely to ever be achieved on foreign architectures."
The El-22 programming language, which includes full computational parallelism, is being developed for the new architecture.
In September 2023, Kommersant reported that Evgeny Babayan, an adviser to the head of Rostec state Corporation, was looking for investors willing to invest 30 billion rubles in a new processor. The project was supposed to be implemented in three years. At that time, the technical details of the project were not mentioned.
It is worth noting that the Elbrus-B project is not associated with the developers of Elbrus processors by MCST. Representatives of the MCST reported that they were not aware of the initiative.
The parallel system provides almost complete security of the computing process and data and is not subject to external influences, as well as provides unique error-free programming capabilities, Babayan noted.
"The architecture of the parallel system is the maximum possible in terms of power for the entire time of the development of computing technology, and its characteristics will only improve with the development of electronic technologies," Babayan assures.
According to Evgeny Babayan, the Elbrus-B project was launched in 2022. Organizational structures have now been established in Russia and agreements have been signed with foreign interested partners. "Leading universities and research institutes in Russia and friendly foreign countries are also involved."
The first stage of the project has now been completed, and the team is embarking on the second stage, according to the presentation.
"It is planned to expand the range of specialists in the second half of 2025, including engineers, managers, and specialists in international activities," he said.
According to him, "a number of countries, including India, have already expressed written interest in participating in the Elbrus-B project." As Evgeny reported at the Strategic Session, agreements "worth 2 billion dollars" have already been signed with India. Babayan does not provide details of the agreements.
"The Elbrus-B project gives impetus to almost all projects to achieve the National Goals set by the President of the Russian Federation," says Evgeny Babayan. In his opinion, the project will solve the problem by achieving the total capacity of domestic supercomputers by at least 10 times by 2030, while further ensuring the technological sovereignty of the Russian Federation.
Experts are quite skeptical about the project. The problem with new architectures is to create an ecosystem around it, Sergey Shumilin, Deputy General Director for Science at PKK Milander, explained to CNews.
"In my opinion, the maximum performance has been squeezed out of the current massive silicon processes, and it is no longer possible to create any breakthrough architectures (x200 performance), they will either be low—tech, high-consumption, or very narrowly focused on only one class of tasks, which means they are not massive and economically unprofitable," says Him. "Insurmountable physical limitations are already starting to take effect."
For success, the new architecture must assume a new model for creating an ecosystem (compilers, libraries, operating systems, etc.), as is done, for example, in RISC-V, says Shumilin.
Creating a parallel computing system is a highly complex task, especially if it affects not only the hardware, but also the programming language and operating system, an interlocutor among processor developers explained to CNews. According to him, the implementation of the project may face a number of problems.
"One of the key challenges is the need for close integration between the various levels of the system," he continues. — The new programming language (in this case, "El—22") should not only be convenient for the developer, but also reflect the features of the microprocessor as accurately as possible so that the compiler can effectively use all the possibilities of parallelism. This is more complicated than it might seem: most modern languages abstract from the details of execution, but here the opposite is required — maximum approximation to hardware."
Another challenge is resource management, the source notes. "Parallel systems often suffer from memory access conflicts, delays in communication between cores, and poor load balancing," he continues. — Even a theoretically powerful architecture can work slower than expected in practice if these problems are not solved. Statements that the system is able to use its resources almost completely sound optimistic, but require serious technical justification."
However, the expert notes the demand for parallel computing. Modern tasks, from machine learning to modeling physical processes, require huge computing power that cannot be obtained on the basis of classical sequential architectures. That is why areas such as GPU computing, heterogeneous systems, and even quantum approaches are actively developing, he notes.
"In this context, Elbrus-B looks like an attempt to create a solution that combines high performance with autonomy from Western technologies. This is especially important given the current restrictions on importing components and software. Secure architecture may be of interest to government agencies, the defense sector, and scientific laboratories — those who need reliable and controlled systems," the source explains.
For some computations, parallelism has a significant effect, for others — almost none. For example, tasks with a high degree of data dependence are difficult to parallelize, and then the stated gain becomes unattainable, he notes.
However, he expresses skepticism about the implementation of architecture outside highly specialized niches. The interlocutors agree on this: creating a new ecosystem is a big problem.
From 1956 to 1996. Boris Babayan worked at the Lebedev Institute of Precision Mechanics and Computer Engineering. Participated in the development, creation and implementation of several generations of domestic computers "Elbrus".
Babayan is a specialist in the field of computing development. His entire career is associated with the creation of high-speed computers and computing complexes. He also participated in the development, creation and implementation of several generations of domestic computers: M-40, 5E92b and Elbrus 1, 2 and 3.
Babayan was the chief designer and chief architect of the development work on the creation of the domestic microprocessor "Elbrus 3M" and the computing complex "Elbrus-3M1" based on it. The microprocessor is designed to solve complex computing tasks in the interests of ensuring information security and technological independence of Russia.
Boris Babayan formulated and substantiated the scientific concept of the highly parallel architecture of the Elbrus 3M microprocessor and the corresponding optimizing compiler, providing a high level of logical speed of the microprocessor for any technology with a given amount of equipment, as well as binary compilation technology, which provides support for binary compatibility in the development of radically new architectures. He personally developed the fundamental principles of building the hardware and compiler, and proposed a number of specific technical solutions aimed at improving the efficiency of their interaction.
In 1992, Babayan and Alexander Kim founded the Moscow SPARC Technology Center (MCST) LLP.
In 1996, Boris Babayan founded the Basic Department of Computing Technologies at the Faculty of Radio Engineering and Cybernetics at MIPT. From 2004 to 2016, he headed the Department of Microprocessor Technologies based at Intel JSC.
Since 2004, he has been Director of Architecture at Intel JSC, where he has been involved in the development and improvement of computer architectures, system software, information security technology, and the development of innovative technologies. He resigned from his position in January 2022.
